1. Field of the Invention
The present invention relates generally to semiconductor integrated circuits. More specifically, the present invention relates to differential voltage regulators used in semiconductor devices
2. Description of the Related Art
A semiconductor device may be designed for any of a wide variety of applications. Typically, the device includes logic circuitry to receive, manipulate or store input data. The circuitry subsequently generates the same or modified data at an output terminal of the device. Depending on the type of semiconductor device or the circuit in which it is used, the device typically includes circuits which provide internal power signals that are regulated to be substantially independent of fluctuations in the externally generated power input signal.
An example of a data storage or memory device having such internal power signal circuits is the DRAM (dynamic random access memory). Conventionally, the DRAM receives an external power signal (VCCX) having a voltage intended to remain constant, for example, at 4.5 volts measured relative to ground. Internal to the DRAM, the power regulation circuit maintains an internal operating voltage signal (VCC) at a designated level, for example, 2.5 volts. Ideally, VCC linearly tracks VCCX from zero volts to the internal operating voltage level, at which point VCC remains constant as VCCX continues to increase in voltage to the designated VCCX level.
DRAMs also typically include a regulated constant pumped supply voltage (VCCP) which is greater than VCC, for example, four volts. Conventionally, the pumped voltage drives the word lines of a DRAM. The DRAM has memory arrays comprising a number of intersecting row and column lines of individual transistors or memory cells. The pumped voltage needs to be greater than VCC to ensure that memory access operations, such as a memory cell read or a memory cell write, are performed both completely and quickly. Ideally, VCCP does not fluctuate. If VCCP is too high, damage to the memory cells may result. If it is too low, the memory chip may have poor data retention or may otherwise operate incorrectly. Depending on the type of memory device, the device may include a second circuit for providing this internal regulated pumped power signal.
Previously implemented CMOS (complementary metal-oxide semiconductor) power regulation circuits for regulating VCCP include an input stage comprising a series of diodes and an inverter circuit having a “trip point” to trigger the point at which the inverter circuit activates the charge pump for VCCP. The series of diodes, which are implemented through a combination of PMOS/NMOS (p-channel MOS/n-channel MOS) transistors, are used to translate the VCCP signal down to the input trip point range for controlling the inverter circuit. The inverter circuit provides an output signal which drives an amplifier (implemented as a series of inverters) to bring the output signal to full CMOS levels.
Semiconductor devices are typically tested extensively by the manufacturer at pre-set voltage levels prior to shipping. These tests are performed under controlled conditions and high VCCP voltage levels may be used to ensure the devices are operating properly. However, some customers may choose to perform their own reliability tests on the devices once they are received. Because the customers' tests are not always performed under the proper conditions, high VCCP voltage levels used during these tests may damage the semiconductor devices due to over-stress. The damaged devices will then fail the reliability tests, even though the device was operating properly when shipped.
What is desired is a circuit that generates a high VCCP voltage level on a semiconductor device for use during testing by the manufacturer, but then limits the VCCP voltage level the circuit generates once the device is shipped. This prevents a customer from inadvertently damaging the device by applying an over-voltage outside of controlled conditions.